Bus Architecture and Communication Interfaces

Modified: Mar. 14, 2026

Published: Mar. 7, 2026

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Microcontrollers communicate with sensors, displays, memory chips, and other MCUs through serial buses. SPI, I2C, and UART are the three protocols you will use most often in embedded programming. This lesson takes you below the HAL function calls to the actual signal waveforms on the wires, so that when something goes wrong (and it will), you can look at a logic analyzer capture and diagnose the problem. #SPI #I2C #UART

Parallel vs Serial Communication

Parallel Buses

A parallel bus sends multiple bits simultaneously, one per wire. The internal buses inside your MCU (AHB, APB) are parallel: 32 data lines carry a full word in one clock cycle.

Advantages: Fast (high throughput per clock cycle).

Disadvantages: Many wires, crosstalk at high frequencies, difficult to route on PCBs, expensive connectors.

Serial Buses

A serial bus sends bits one at a time over fewer wires. SPI, I2C, and UART are all serial.

Advantages: Few wires (2 to 4), simple PCB routing, long-distance capable.

Disadvantages: Lower throughput per clock cycle (but high clock rates compensate).

Comparison

SPI: Serial Peripheral Interface

Signal Lines

SPI uses four signals (three for unidirectional communication):

How SPI Works

SPI is essentially two shift registers connected in a ring:

  Master                         Slave
 ┌──────────┐                  ┌──────────┐
 │ Shift    │──── MOSI ──────→│ Shift    │
 │ Register │                  │ Register │
 │ (8-bit)  │←─── MISO ──────│ (8-bit)  │
 └──────────┘                  └──────────┘
       │                             │
       └──────── SCLK ──────────────→│
       │                             │
       └──────── CS ────────────────→│

On each clock edge, one bit shifts out of the master’s shift register (on MOSI) and one bit shifts in from the slave (on MISO). After 8 clock cycles, the master and slave have exchanged one byte.

This is exactly the 74HC595 shift register from Lesson 4, but now the shift register has both an input and an output, forming a bidirectional data exchange.

Clock Polarity and Phase (CPOL/CPHA)

SPI has four modes defined by two parameters:

• CPOL (Clock Polarity): the idle state of the clock (0 = low when idle, 1 = high when idle)
• CPHA (Clock Phase): which clock edge captures data (0 = first edge, 1 = second edge)

Mode 0 is the most common. Many sensors and displays default to Mode 0.

SPI Timing Diagram (Mode 0)

CS:    ─────┐                                          ┌─────
            └──────────────────────────────────────────┘

SCLK:  ─────┐  ┌──┐  ┌──┐  ┌──┐  ┌──┐  ┌──┐  ┌──┐  ┌──┐  ┌─
            └──┘  └──┘  └──┘  └──┘  └──┘  └──┘  └──┘  └──┘

MOSI:  ═══╡ D7 ╞╡ D6 ╞╡ D5 ╞╡ D4 ╞╡ D3 ╞╡ D2 ╞╡ D1 ╞╡ D0 ╞═══

MISO:  ═══╡ D7 ╞╡ D6 ╞╡ D5 ╞╡ D4 ╞╡ D3 ╞╡ D2 ╞╡ D1 ╞╡ D0 ╞═══

1. Master pulls CS low to select the slave.
2. Master generates 8 clock pulses on SCLK.
3. On each rising edge (Mode 0), both master and slave sample the data line.
4. On each falling edge, both sides set up the next bit.
5. After 8 clocks, one byte has been exchanged in each direction.
6. Master pulls CS high to deselect the slave.

Multiple Slaves

Each slave needs its own CS line. The master pulls one CS low to communicate with that slave while keeping all others high (deselected).

         Master
        ┌──────┐
  SCLK ─┤      ├─── CS0 ──→ Slave 0
  MOSI ─┤      ├─── CS1 ──→ Slave 1
  MISO ─┤      ├─── CS2 ──→ Slave 2
        └──────┘

This means SPI requires one additional MCU pin per slave device. With many slaves, you can use a decoder (Lesson 3) to generate CS signals from a smaller number of address pins.

I2C: Inter-Integrated Circuit

Signal Lines

I2C uses only two wires for any number of devices:

Both lines use open-drain drivers with external pull-up resistors (typically 4.7K ohm to VCC). Any device can pull the line low, but no device drives it high. The pull-up resistor pulls the line high when no device is pulling it low.

I2C Bus with Multiple Devices

  I2C bus topology

       VCC          VCC
        │            │
       [4.7K]       [4.7K]
        │            │
  ──────┼────────────┼──────── SCL
  ──────┼────────────┼──────── SDA
        │            │
  ┌─────┴──┐   ┌────┴───┐
  │ Master │   │BME280  │
  │ (MCU)  │   │ 0x76   │
  └────────┘   └────────┘
        │            │
  ┌─────┴──┐   ┌────┴───┐
  │SSD1306 │   │DS3231  │
  │ 0x3C   │   │ 0x68   │
  └────────┘   └────────┘

  All devices share two wires.
  Pull-ups required on both lines.

I2C Addressing

Each slave device on the bus has a unique 7-bit address (some devices use 10-bit addressing). The master sends the address at the start of each transaction, and only the addressed slave responds.

Common I2C addresses:

I2C Protocol: Write Transaction

A complete I2C write transaction to send one data byte:

SDA: ─┐ ┌───┬───┬───┬───┬───┬───┬───┬───┬───┬───┬───┬───┬───┬───┬───┬───┬───┬─┐ ┌──
      └─┤A6 │A5 │A4 │A3 │A2 │A1 │A0 │R/W│ACK│D7 │D6 │D5 │D4 │D3 │D2 │D1 │D0 │ACK├─┘
        └───┴───┴───┴───┴───┴───┴───┴───┴───┴───┴───┴───┴───┴───┴───┴───┴───┴───┘
      START  7-bit address      W   Ack     8-bit data              Ack  STOP
            (from master)     (0) (slave)  (from master)           (slave)

1. START condition: Master pulls SDA low while SCL is high. This signals all slaves to listen.
2. Address byte: Master sends the 7-bit slave address followed by a R/W bit (0 = write, 1 = read). MSB first.
3. ACK from slave: The addressed slave pulls SDA low during the 9th clock pulse to acknowledge. If no slave responds, SDA stays high (NACK), indicating an error.
4. Data byte: Master sends 8 data bits, MSB first.
5. ACK from slave: Slave acknowledges receipt of the data byte.
6. STOP condition: Master releases SDA while SCL is high.

I2C Clock Stretching

A unique feature of I2C: the slave can hold SCL low to pause the transfer if it needs more time to process data. The master must wait for SCL to go high before continuing. This is called clock stretching and is why SCL must be open-drain (the slave needs to pull it low).

I2C Speed Modes

Most embedded projects use Standard (100 kHz) or Fast (400 kHz) mode.

UART: Universal Asynchronous Receiver/Transmitter

Signal Lines

UART uses two data lines with no clock:

Since there is no clock, both sides must agree on the data rate (baud rate) beforehand. This is why UART is “asynchronous.”

UART TX/RX Connection

  UART point-to-point wiring

  Device A              Device B
  ┌────────┐            ┌────────┐
  │     TX ├───────────→│ RX     │
  │        │            │        │
  │     RX │◄───────────┤ TX     │
  │        │            │        │
  │    GND ├────────────┤ GND    │
  └────────┘            └────────┘

  TX of one device connects to RX
  of the other (crossover wiring).
  Shared ground is required.

UART Frame Format

A standard UART frame consists of:

Idle ─────┐   ┌───┬───┬───┬───┬───┬───┬───┬───┬───┬─────── Idle
          └───┤D0 │D1 │D2 │D3 │D4 │D5 │D6 │D7 │(P)├───────
          Start  8 data bits (LSB first)      Parity  Stop
          bit                                 (opt.)  bit(s)

Baud Rate

The baud rate specifies how many bits per second are transmitted. Common rates:

“8N1” means 8 data bits, No parity, 1 stop bit (the most common configuration). Each byte takes 10 bit periods (1 start + 8 data + 1 stop).

How the Receiver Synchronizes

Without a clock, the receiver uses the start bit to synchronize:

1. The line is idle (high).
2. The receiver detects a falling edge (start bit).
3. The receiver waits half a bit period to sample the middle of the start bit, confirming it is still low.
4. The receiver then samples at one-bit-period intervals to read each data bit.
5. After the last data bit (and optional parity), the receiver checks for the stop bit (high).
6. The receiver returns to waiting for the next start bit.

For this to work reliably, the transmitter and receiver baud rates must match within about 2-3%. If the rates drift too far apart, bit sampling falls at the wrong time and data corrupts.

UART vs RS-232 vs TTL

MCU UART pins operate at TTL levels (3.3V or 5V). To connect to a PC serial port (RS-232), you need a level converter like the MAX232. Most modern connections use a USB-to-TTL serial adapter (like the FTDI FT232 or CH340) that handles the conversion.

Comparing SPI, I2C, and UART

When to Use Which

Practical: Observe Serial Signals

Using a Logic Analyzer

A logic analyzer captures digital signals and displays them as timing diagrams. Inexpensive USB logic analyzers (Saleae clones or compatible) cost a few dollars and support protocol decoding for SPI, I2C, and UART.

1. Connect probes to the signal lines (SCLK, MOSI, MISO, CS for SPI; SCL, SDA for I2C; TX for UART). Always connect the analyzer’s GND to the circuit’s GND.

2. Set the sample rate to at least 4 times the bus clock frequency. For SPI at 1 MHz, sample at 4 MHz or higher.

3. Trigger on the CS falling edge (SPI), START condition (I2C), or TX falling edge (UART).

4. Capture a transaction and examine the waveform.

5. Enable protocol decoding in your analyzer software. It will overlay the decoded bytes on the waveform, showing addresses, data values, and ACK/NACK.

What to Look For

SPI problems:

• Clock polarity mismatch (CPOL): data looks shifted or garbled
• CS not going low: slave ignores all data
• MISO stuck high: slave not responding (wrong CS, slave not powered, or wrong SPI mode)

I2C problems:

• NACK after address: wrong address, slave not powered, or missing pull-up resistors
• SDA stuck low: slave holding the bus (reset the slave or power cycle)
• Missing pull-up resistors: signals do not reach VCC, causing intermittent failures

UART problems:

• Baud rate mismatch: data appears as garbage characters
• TX/RX swapped: no data in either direction
• Missing ground connection: no data or random noise

Exercises

Exercise 1: SPI Byte Exchange

A master sends 0xA5 to a slave via SPI Mode 0, MSB first. Draw the sequence of bits on MOSI for all 8 clock cycles.

Exercise 2: I2C Address Calculation

You want to write to a device at address 0x50. What is the full first byte sent on the bus (including the R/W bit) for a write operation? What about for a read?

uint8_t write_addr = (0x50 << 1);       // 0xA0
uint8_t read_addr  = (0x50 << 1) | 1;   // 0xA1

Exercise 3: UART Timing

At 115200 baud, how long does it take to transmit the string “Hello” (5 characters)? Assume 8N1 framing.

How This Connects to Embedded Programming

Summary

In the next lesson, you will explore ADC and DAC: how analog voltages are converted to digital numbers and back.