Combinational Logic: Multiplexers, Decoders, Adders

Modified: Mar. 14, 2026

Published: Mar. 3, 2026

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In the previous lesson you learned individual logic gates. Now you will combine them into larger circuits that perform useful functions: selecting one of several inputs, decoding binary addresses into individual enable signals, and adding binary numbers. These combinational circuits are called “combinational” because their output depends only on the current inputs, with no memory of previous states. Every microcontroller uses these blocks internally. #CombinatorialLogic #Multiplexers #BinaryAdders

What Is Combinational Logic?

A combinational circuit has:

• No memory: the output is determined entirely by the current inputs
• No clock: the output changes whenever an input changes (after a small propagation delay)
• A defined function: for every possible combination of inputs, there is exactly one output

Compare this with sequential circuits (Lesson 4), which have memory and depend on both current inputs and past states.

Multiplexers (MUX)

Concept

A multiplexer selects one of several input signals and forwards it to a single output. Think of it as a digitally controlled switch. The selection is controlled by “select” lines.

A 2-to-1 multiplexer has:

• 2 data inputs (, )
• 1 select input ()
• 1 output ()

Truth table:

Boolean expression:

This is built from two AND gates, one NOT gate, and one OR gate.

4-to-1 Multiplexer

A 4-to-1 mux has 4 data inputs, 2 select lines, and 1 output:

  4-to-1 Multiplexer Block Diagram

  D0 ──┐
       │
  D1 ──┤     ┌─────┐
       ├─────┤     │
  D2 ──┤     │ MUX ├──── Y (output)
       │     │ 4:1 │
  D3 ──┘     └──┬──┘
                │
           ┌────┴────┐
           S1       S0
         (select lines)

Boolean expression:

Each term is a 3-input AND gate. The four AND outputs feed into a 4-input OR gate.

General Pattern

An -to-1 multiplexer needs select lines. Common sizes:

Where Multiplexers Appear in MCUs

Inside your microcontroller, multiplexers are everywhere:

• GPIO alternate function selection: Each GPIO pin can serve multiple functions (UART TX, SPI MOSI, timer output). A multiplexer controlled by configuration register bits selects which function reaches the pin.
• Clock source selection: The RCC module uses multiplexers to choose between HSI, HSE, and PLL as the system clock source.
• ADC channel selection: When you select which analog channel to convert, you are programming a multiplexer.

Demultiplexers (DEMUX)

A demultiplexer does the opposite of a multiplexer: it takes one input and routes it to one of several outputs based on the select lines.

1-to-4 Demultiplexer

Where is the input data. Only one output is active at a time; the others are held at 0.

In embedded systems: DMA channel routing uses demultiplexer-like logic to direct data from one source to one of several destinations.

Decoders

Concept

A decoder converts a binary code into individual output lines. Only one output is active at a time. A decoder is essentially a demultiplexer with the data input permanently set to 1.

2-to-4 Decoder

2 input lines, 4 output lines. Exactly one output is high for each input combination.

Boolean expressions:

Each output is one AND gate. The decoder is four AND gates plus two inverters.

3-to-8 Decoder

3 input lines, 8 output lines. The 74HC138 is a classic 3-to-8 decoder IC.

Address Decoding in Memory Systems

This is one of the most important applications of decoders. When a microcontroller accesses memory, the upper address bits pass through a decoder to determine which memory chip or peripheral responds:

  Address decoding with a 3-to-8 decoder

  Address Bus
  A15 ──┐
  A14 ──┤ 3-to-8  ├── Y0 → Flash CS
  A13 ──┤ Decoder ├── Y1 → SRAM CS
        │ (74138) ├── Y2 → Periph 1 CS
        │         ├── Y3 → Periph 2 CS
        │         ├── Y4 → (unused)
        │         ├── Y5 → (unused)
        │         ├── Y6 → (unused)
        └─────────┴── Y7 → (unused)

  A12..A0 go directly to each device
  (8 KB per device)

The three highest address bits (A15, A14, A13) select which device is enabled. The remaining 13 bits address locations within that device, giving each device an 8 KB address range.

Encoders

Concept

An encoder is the reverse of a decoder. It has multiple input lines (only one should be active at a time) and produces a binary code representing which input is active.

4-to-2 Priority Encoder

A priority encoder handles the case where multiple inputs might be active simultaneously by giving priority to the highest-numbered input.

The “X” entries mean “don’t care.” If is active, the output is 11 regardless of what , , or are doing.

In embedded systems: The NVIC (Nested Vectored Interrupt Controller) in ARM Cortex-M microcontrollers uses priority encoding to determine which interrupt to service when multiple interrupts are pending simultaneously.

Half Adder

Concept

A half adder adds two single-bit numbers and produces a sum and a carry:

Look at the truth tables:

• Sum matches the XOR truth table:
• Carry matches the AND truth table:

A half adder is just one XOR gate and one AND gate. It is called “half” because it cannot handle a carry input from a previous stage.

Full Adder

Concept

A full adder adds two bits plus a carry-in from the previous stage, producing a sum and a carry-out:

  Full Adder Block Diagram

      A       B
      │       │
      ▼       ▼
    ┌───────────┐
    │           │
    │   Full    │◄── Cin (carry in)
    │   Adder   │
    │           │
    └──┬─────┬──┘
       │     │
       ▼     ▼
      Sum   Cout (carry out)

Boolean expressions:

A full adder is built from two half adders and one OR gate, or equivalently from two XOR gates, two AND gates, and one OR gate.

Ripple Carry Adder

Chain full adders together to add two -bit numbers. The carry-out of each stage connects to the carry-in of the next:

       A3 B3      A2 B2      A1 B1      A0 B0
        | |        | |        | |        | |
      [Full]     [Full]     [Full]     [Full]
      Adder 3    Adder 2    Adder 1    Adder 0
        |          |          |          |
  C4←──Cout  C3←──Cout  C2←──Cout  C1←──Cout←── C0 (0)
        |          |          |          |
        S3         S2         S1         S0

The 4-bit ripple carry adder adds two 4-bit numbers (A3..A0 + B3..B0) and produces a 4-bit sum (S3..S0) plus a carry-out (C4).

The “ripple” refers to how the carry propagates through each stage sequentially. The worst case delay is for the carry to ripple from the least significant bit to the most significant bit. This is simple but slow for large numbers. Modern CPUs use carry-lookahead adders for faster addition.

  4-bit ripple carry adder

  A3 B3    A2 B2    A1 B1    A0 B0
   │  │     │  │     │  │     │  │
  ┌┴──┴┐   ┌┴──┴┐   ┌┴──┴┐   ┌┴──┴┐
  │ FA │◄──│ FA │◄──│ FA │◄──│ FA │◄── 0
  │  3 │C3 │  2 │C2 │  1 │C1 │  0 │   Cin
  └─┬──┘   └─┬──┘   └─┬──┘   └─┬──┘
  C4│  S3    │  S2    │  S1    │  S0
    ▼        ▼        ▼        ▼
 (overflow)

Practical: Build a 4-to-1 Multiplexer from Gates

Parts Needed

Circuit Description

1. Set up four data inputs ( through ) using four DIP switch positions. Each switch connects to 5V (logic 1) or is pulled to GND (logic 0) through a 10K resistor.

2. Set up two select inputs (, ) using two push buttons with pull-down resistors.

3. Build the inverters: Use the 74HC04 to generate and from the select inputs.

4. Build four AND gates (3-input each): Each AND gate enables one data input based on the select combination.

   • Gate for : AND of , , . Use two 2-input AND gates cascaded (AND the first two, then AND the result with ).
   • Gate for : AND of , , .
   • Gate for : AND of , , .
   • Gate for : AND of , , .

5. OR the four AND outputs together using two stages of 74HC32 (OR the first two, OR the second two, then OR the results).

6. Connect the final OR output to an LED through a 220 ohm resistor.

7. Test: Set the DIP switches to different patterns and use the push buttons to select which input appears at the output. For example, set , , , . With , , the LED should light (selecting ). With , , the LED should be off (selecting ).

Practical: Build a 2-Bit Adder

Parts Needed

Building Two Full Adders

1. Assign DIP switches: SW1 = , SW2 = , SW3 = , SW4 = . Each switch connects to 5V when on and has a 10K pull-down to GND when off.

2. Build Full Adder 0 (LSB):

   • XOR gate 1: (use 74HC86, gate 1)
   • XOR gate 2: = . Since for the first adder, the sum is just . Connect this to the LED.
   • AND gate 1: (carry out for this stage). Use 74HC08, gate 1.

3. Build Full Adder 1 (MSB):

   • XOR gate 3: (use 74HC86, gate 2)
   • XOR gate 4: (use 74HC86, gate 3, where is the carry from Full Adder 0). This is . Connect to the LED.
   • For : AND gate 2 for , AND gate 3 for , OR gate for the two AND results. Connect to the LED.

4. Test all combinations using the truth table below. Verify each combination by checking the LED pattern.

Exercises

Exercise 1: Design a 2-to-4 Decoder

Write the Boolean expressions for all four outputs of a 2-to-4 decoder. Then draw how you would build it using only 74HC04 (NOT) and 74HC08 (AND) ICs, listing which pins you would use.

Exercise 2: 8-to-1 Multiplexer

How many select lines does an 8-to-1 multiplexer need? Write the Boolean expression for the output in terms of through and select lines , , .

Exercise 3: Adder Overflow

What is the maximum sum a 4-bit ripple carry adder can produce? What happens if both inputs are 1111 (15)?

How This Connects to Embedded Programming

Summary

In the next lesson, you will add memory to your circuits. Flip-flops and latches store state, turning combinational logic into sequential circuits that can remember, count, and shift data.